Lecture 3¶

Overview of the program¶

1. Presentations

   EE4109 Lecture 3 agenda and introduction

   Presentation

   The presentation “EE4109 Lecture 3 ” shows the agenda.

   Poster

   “CMOS amplifier stages”

   The CS stage (JFET or MOSFET) and the CE stage (BJT) can be regarded as basic amplifier stages. Other stages can be derived from these stages through application of error reduction techniques, such as, compensation and negative feedback. If the error reduction capabilities of such techniques are known, the properties of these derived stages can easily be predicted from the properties of the basic stage and the error reduction capabilities of the applied technique.

2. Discussion of homework: Lecture3SLiCAP.zip.

3. Guidance with homework

Study¶

Basic amplification and the CS stage, Chapter 3 and Chapter 5, respectively.

Read¶

CMOS operation and modeling: Chapter 4.4.

Homework¶

Study the characteristics of the CS stage:

1. Install VirtualBox 6 on your computer
2. Download the Virtual Machine
3. Install the virtual maching as described in VM_Startup.pdf
4. Download the manual
5. Create the following plots for the CMOS N channel device (default geometry)
   1. \(I_{DS}(V_{GS})\) with \(V_{DS}\) as parameter
   2. \(I_{DS}(V_{DS})\) with \(V_{GS}\) as parameter
   3. \(F_T(I_{DS})\) with \(V_{DS}\) as parameter
   4. \(g_m(I_{DS})\) with \(V_{DS}\) as parameter
6. In which way do the above graphs change if you increase the width of the device
7. In which way do the above graphs change if you increase the length of the device