Modified Nodal Analysis

1  Introduction

Designers of analog electronic circuits often need to investigate the small-signal static or dynamic behavior of designed circuits. For this, they can take their refuge to CAD programs and obtain numerical results from a small-signal analysis (often called an AC sweep). Although those numerical simulations can give accurate results, they do not provide insight in underlying mechanisms. Symbolic analysis of simplified circuits often does give a lot more design information but it requires unpopular hand calculations.
Nowadays, many symbolic analysis tools are available to help designers with those calculations. Optimum use of these programs requires adequate formulation of the problem; which is often in the form of a matrix representation.
Nodal Analysis (NA) techniques (see section 2) can be used for networks having voltage-controlled elements only. Networks that also include current-controlled elements such as voltage sources, can be transformed into networks with voltage-controlled elements only, using the Norton transformation (see figure 6) and Blakesley's voltage shift theorem (see figure 7). Alternatively the so-called Modified Nodal Analysis (MNA) can be used (see section 3). Modified Nodal Analysis is implemented in many SPICE-like simulators.
In many cases, designers are interested in some specific properties of a circuit such as port impedances or the signal transfer from a signal source to a load. For this, complete solution of the network and symbolic expressions for all nodal voltages and branch currents is seldom required. Specific transfers can much faster be found by application of Cramer's rule (see section 4).
This overview is illustrated with a number of examples:
  1. Section 2.2: Nodal analysis of a simple RC-circuit.
  2. Section 2.5: Calculation of the small-signal voltage transfer of a voltage follower, realized with an operational amplifier, using Nodal Analysis.
  3. Section 3.1: Illustration of Modified Nodal Analysis.
  4. Section 5.1: Calculation of the small-signal voltage transfer of a voltage follower, realized with an operational amplifier, using Modified Nodal Analysis.
  5. Section 5.2: Evaluation of the voltage gain of an OpAmp circuit using MNA.
  6. Section 5.2: Evaluation of the coefficients of a second-order active low-pass filter.
  7. Section 5.2: Evaluation of the coefficients of a third-order active low-pass filter.
  8. Section 5.2: Evaluation of the input impedance of a Generalized Impedance Converter (GIC).
This overview summarizes the above topics, which are assumed to cover the designer's daily analysis needs. It does not give the underlying theory. For this the reader is referred to literature on network theory and linear algebra.

2  Nodal Analysis

2.1  Introduction

Nodal analysis is a network analysis method that provides the nodal voltages from the independent currents flowing into the nodes. It is based upon the application of Kirchhoff's current law (see 1), which states that the sum of the electric currents that flow into a node equals zero.
Figure 1: Kirchhoff's current law.
Networks that consists of voltage-controlled elements only, can directly be solved with the nodal analysis method. A network element is said to be voltage controlled if its branch currents are uniquely defined by its branch voltages. This is not the case for i.e. voltage sources. These sources have their voltage unambiguously defined by their current and are therefore called current-controlled elements. As we will see later, networks with current-controlled elements can be solved using modified nodal analysis (MNA). In the next section we will demonstrate the nodal analysis method for a simple network comprising voltage-controlled elements only.

2.2  The procedure

The procedure for nodal analysis is as follows:
  1. Set-up the circuit diagram, select a reference node and number all remaining nodes
  2. Set-up the nodal equations for all nodes except the reference node
    This results in the following matrix equation: I=YV
    Where I is the vector of independent currents that flow into a node, Y is the admittance matrix that depends both on the graph and the element relations of the network elements, and V is the vector of the nodal voltages with respect to the voltage at a reference node. A network having n nodes requires n-1 nodal equations. The voltage of the reference node is usually taken zero.
  3. Find the network solution (all nodal voltage and branch currents). The nodal voltages are found from V= Y-1 I
    The branch currents I(j,k) (jk) are found from I(j,k)=( Vj - Vk ) Yjk
    The transfer functions from Ik to Vj are found as:
    Vj Ik = ( Y-1 )j,k
Example
Let us consider the network from figure 2 and derive expressions for the current to voltage transfer Z= V Is .
Figure 2: Circuit for Nodal Analysis
According to the first step we have to select a reference node and number the remaining nodes. If we select the top of Is as reference node, we only have to calculate the voltage at common node for R2 to C2 . The numbered nodes are shown in figure 3.
Figure 3: Circuit from figure 2, with reference node (0) and nodes (1) and (2).
The nodal equations are:
0= Is + V1 sC1 + V1 1 R1 +( V1 - V2 ) sC2 (1)

0= V2 1 R2 +( V2 - V1 ) sC2 (2)
In matrix form:
( - Is 0 )=( s( C1 + C2 )+ 1 R1 - sC2 - sC2 sC2 + 1 R2 )( V1 V2 ) (3)
Or, alternatively:
( - Is 0 )T =M ( V1 V2 )T (4)
in which
M=( s( C1 + C2 )+ 1 R1 - sC2 - sC2 sC2 + 1 R2 ) (5)
The network solution is obtained as
( V1 V2 )T = M-1 ( - Is 0 )T (6)
From which the current to voltage transfer is found as
V Is =- ( M-1 )2,1 = - sC2 R1 R2 1+s(( C1 + C2 ) R1 + C2 R2 )+ s2 C1 C2 R1 R2 (7)

2.3  General form of the admittance matrix

The general form of the node equation for node k is:
ik =- Yk,1 v1 - Yk,2 v2    ...+ Yk,k vk    ...- Yk,n-1 vn-1 (8)
where:
Yk,j = sum of the admittances connected between node k and node j,
Yk,k = sum of the admittances connected to node k,
ik = sum of the independent currents flowing into node k.
In words: each diagonal element of the admittance matrix equals the sum of the admittances of each element connected to the corresponding node. So the first diagonal element is the sum of admittances connected to node 1, the second diagonal element is the sum of admittances connected to node 2, and so on.
The off-diagonal elements are the sum of the negative admittances of the elements connected to the pair of corresponding nodes. Hence, an admittance between nodes 1 and 2 appears into the Y matrix at location (1,1) and (2,2) with a positive sign and at locations (1,2) and (2,1) with a negative sign. This is shown in figure 4.
Hence, a network having passive elements only, has a symmetrical admittance matrix Yjk = Ykj .
Figure 4: A passive admittance and its contributions to the admittance matrix for a network having n nodes excluding the reference node.

2.4  Voltage-controlled current sources

Figure 5: A voltage-controlled current source and its contributions to the admittance matrix, for a network having n nodes excluding the reference node.
Voltage-controlled current sources can easily be handled using nodal analysis. A voltage-controlled current source Gx , with its current flowing from node into node m and which is controlled by the voltage between node p (positive) and node q (negative) and a gain of g [A/V], adds in the -th row +g in column p and -gin column q, and in the m-th row -g in column p and +g in column q. This is illustrated in figure 5.

2.5  Network transformations

Nodal Analysis can be applied for networks having voltage-controlled elements only. Voltage controlled elements have a current flow that is uniquely defined by their branch voltages. This is not the case for e.g. voltage sources; their current is not defined by their voltage. Voltage sources are so-called current-controlled elements. With the aid of network transformations, we can replace voltage sources by current sources and find the network solution with Nodal Analysis. Any voltage source which is placed in series with an impedance can be replaced by a current source in parallel with that impedance (Norton equivalent circuit), thereby reducing the number of nodes by one. This is shown in figure 6.
Figure 6: Norton equivalent circuit
a) Voltage source in series with an impedance
b) Current source representation using Norton equivalent circuit.
Figure 7: Blakesley Voltage Shift Theorem
a) A voltage source connected to a number of branches
b) Equivalent representation using the Blakesley Voltage Shift Theorem.
If a voltage source is connected to a multiple of branches it must be "shifted through the node" before it can be replaced by a current source. This shifting is known as the Blakesley Voltage Shift; it is shown in figure 7. It should be noticed that the Blakesley shift increases the number of nodes.
Example
Calculation of the small-signal voltage transfer of a voltage follower realized with an operational amplifier
For this example we use a simple OpAmp model as shown in figure 8. In this model, only the DC voltage gain, the DC output resistance and the first-order bandwidth are modeled.
Figure 8: Simple OpAmp model
(a) Operational Amplifier with power supplies
(b) Simplified small-signal model of (a).
The complete circuit of the voltage follower with the operational amplifier and its small-signal equivalent circuit are shown in figure 9. The circuit from figure 9b can further be simplified to that of figure 10 with the aid of Norton equivalent representations for the voltage sources and their corresponding series impedances. This circuit has now three nodes and its 2×2 admittance matrix can easily be found using Nodal Analysis:
( Vs Rs 0 )=Y( Vi V ) (9)
In which
Y=( 1 Rs 0 - Adm Ro (1+sτ) 1 Ro + sC + Adm Ro (1+sτ) ) (10)
The source-load transfer can now be found as:
V Vs = 1 Rs ( Y-1 )2,1 = 1 1+ 1 Adm +s τ+ Ro C Adm + s2 τ Ro C Adm (11)
Figure 9: Voltage follower and its small-signal model
(a) Voltage follower with operational amplifier and power supplies
(b) Simplified small-signal model of (a).
Figure 10: Circuit from figure 9b, simplified with the aid of Norton equivalent representations for the voltage sources in series with their corresponding impedances.

3  Modified Nodal Analysis

3.1  The procedure

Modified Nodal Analysis can be applied for networks having also current controlled elements such as voltage sources. Like Nodal Analysis, Modified Nodal Analysis is based upon the application of Kirchhoff's current law (KCL). Voltage sources can be treated by adding the unknown currents through these elements to the vector with unknown node voltages. Additional equations are found from the relations between the independent voltage sources and the nodal voltages. In this way the independent voltages are added to the independent current vector. The procedure is as follows:
  1. Set-up the circuit diagram, select a reference node and number all remaining nodes as with Nodal Analysis.
  2. Define the m unknown currents through the m independent voltage sources
  3. Set-up the n-1 nodal equations for a network having n nodes
  4. Relate the m voltages of the independent voltage sources to the nodal voltages that they are connected to, we now have a matrix equation of the form:
    ( I V )=( YC BO )( Vn Iv ) (12)
    In which ( I V )= vector with independent current and voltage sources,
    ( Vn Iv )= vector with n-1 unknown nodal voltages and m unknown currents through the m independent voltage sources,
    ( YC BO )= matrix that consists of 4 sub matrices:
    (Y)=(n-1)×(n-1) admittance matrix as with NA
    (B)=m×(n-1) matrix with topology information of the independent voltage sources
    (C)= (B)T for networks that have only independent voltage sources
    (O)=m×m matrix containing zeros only for independent sources
    Figure 11: Contributions of an independent voltage source to the MNA matrix and the vectors, for a network having n nodes, excluding the reference node.
    The B matrix is an m×(n-1) matrix with only 0, 1 and -1 elements. Each location in the matrix corresponds to a particular voltage source (row) or node (column). If the positive terminal of the i-th voltage source is connected to node , then Bi. =1. If the negative terminal of the i-th voltage source is connected to node m, then Bi,m =-1. If the network has only independent voltage sources, all other elements of the B matrix are zero and the C matrix is the transposed version of the B matrix. This is illustrated in figure 11. The network equation added by the voltage source:
    V= V - Vm
    Since + Iv flows from node , it is added to the -th nodal equation. Similarly, -1 is added to the m-th equation.
  5. Find the network solution (all nodal voltage and all branch currents). All the nodal voltages and unknown currents through the voltage sources are obtained from
    ( Vn Iv )= ( YC BO )-1 ( I V ) (13)
    The branch currents I(j,k)(jk , j<n and k<n) are found from
    I(j,k)=( Vj - Vk ) Yjk (14)
Before we will discuss the coefficients of the B and C matrices for all kinds of network elements, we will give an example of MNA for a network with some voltage sources.
Example
Let us consider the circuit from figure 12. We will find an expression for the voltage across R3 with the aid of MNA.
Figure 12: Circuit for illustration of the MNA.
We will start with the selection of the reference node and numbering of the remaining nodes. We will select the common terminal of the two voltage sources as reference node. We also will define the unknown currents through the voltage sources. This is shown in figure 13.
Figure 13: Circuit from figure 12 with numbered nodes.
We are now able to set up the MNA matrix equation:
( 000 VA VB )T =M ( V1 V2 V3 IA IB )T (15)
In which
M=( 1 R1 - 1 R1 010 - 1 R1 1 R1 + 1 R2 + 1 R3 - 1 R2 00 0- 1 R2 1 R2 01 10000 00100 ) (16)
The nodal voltage V2 can be found as
V2 = VA ( M-1 )2,4 + VB (M-1 )2,5 = R2 R3 VA + R1 R3 VB R1 R2 + R1 R3 + R2 R3 (17)
It will be clear that the results of the above example could as well have been obtained in other ways. With the aid of Norton equivalent circuits we can eliminate two nodes and obtain quick results. We also could use the superposition theorem by adding the individual contributions of VA and VB over R3 . Nevertheless, MNA combined with a symbolic analysis program is a powerful way to find expressions for transfers of linear networks.

4  Cramer's Rule

In the above example, we found V2 by linear superposition of the voltages caused by the two independent voltage sources VA and VB . Alternatively, V2 could be found with the aid of Cramer's rule.
Having a system described by
I=MV (18)
in which I is the vector of independent variables and V is the vector with dependent variables, Cramer's rule states that a dependent variable i.e. Vi can be found as
Vi = det M' detM (19)
In which M' is the matrix M in which the i-th column has been replaced by the vector with independent variables I.
We will now find V2 from the previous example with the aid of Cramer's rule.
To do so we have to find the matrix M' by substituting the 2nd column of M with the vector ( 000 VA VB )T . In this way we obtain:
M' =( 1 R1 0010 - 1 R1 0- 1 R2 00 00 1 R2 01 1 VA 000 0 VB 100 ) (20)
Application of Cramer's rule yields:
V2 = det M' detM = R2 R3 VA + R1 R3 VB R1 R2 + R1 R3 + R2 R3 (21)

5  More MNA stamps

5.1  Voltage-controlled voltage sources

Figure 14: Voltage-controlled voltage source with voltage gain Av , SPICE syntax, symbol, device equation and MNA stamp.
Let us now consider the contribution to the MNA matrix stamp of a voltage-controlled voltage source and solve the problem from example 2.5 with MNA. Figure 14 shows the MNA stamp for a voltage-controlled voltage source Ex with voltage gain Av connected between node (1) and (2) with its voltage controlled by the voltage between node (3) and (4). The unknown current through the voltage source IEx is added to the vector with the unknown node voltages.
Example
Let us now solve the problem from example 2.5 with the aid of MNA. Figure 15 shows the circuit with nodes and currents through the voltage sources.
Figure 15: Small-signal equivalent circuit from example 2.5, prepared for MNA.
The MNA equation for this circuit is
( 0000 Vs 0 )T =M ( V1 V2 V3 V4 Is Io )T (22)
In which
M=( 1 Rs - 1 Rs 0010 - 1 Rs 1 Rs 0000 00 1 Ro - 1 Ro 01 00- 1 Ro 1 Ro + sC 00 100000 0- Adm 1+sτ 1 Adm 1+sτ 00 ) (23)
The transfer from the source voltage Vs to the load voltage V = V4 is found as
V Vs = ( M-1 )4,5 = 1 1+ 1 Adm +s Ro C +τ Adm + s2 τ Ro C Adm (24)
Which, of course, is equal to the result from example 2.5.

5.2  The Nullor

Figure 16: The nullor, its symbol and its MNA stamp.
Evaluation of the performance of idealized negative-feedback circuits is almost daily practice for designers of analog circuits. Such circuits comprise a high-gain amplifying device equipped with one or more passive feedback loops. A network element for such a high-gain device is a nullor. A nullor consists of two network elements: a nullator and a norrator. The combination of these two devices can be seen as an ideal amplifier with an infinite available power gain for any input or output termination. Figure 16 shows the symbol and the MNA stamp of a nullor.
The nullator and norrator of the nullor only communicate through the external circuit. In a feedback circuit, the norrator generates a current such that the voltage across the nullator equals zero. If more nullors appear in one circuit, one can arbitrarily combine nullators and norrators in pairs without changing the operation of the circuit. It should be noted that the signs of the gain factors of the nullor are undefined. In the following example, we will evaluate the gain of a negative feedback voltage amplifier having a nullor as amplifying device.
Example
Consider the circuit from figure 17. We will evaluate the voltage gain from source to load using MNA.
The MNA matrix equation can be found as
( 0000 Vs 0 )T =M ( V1 V2 V3 V4 Is Io )T (25)
Figure 17: Negative-feedback voltage amplifier with a nullor.
In which the matrix M is defined as:
M=( 1 Zs - 1 Zs 0010 - 1 Zs 1 Zs 0000 00 1 Z1 + 1 Z2 - 1 Z1 00 00- 1 Z1 1 Z + 1 Z1 0-1 100000 01-1000 ) (26)
From which the source-load transfer can be found as:
V Vs = ( M-1 )4,5 = Z1 + Z2 Z2 (27)
Example
The circuit from figure 18 represents a two-pole active low-pass filter. The OpAmp can be considered as a nullor. Give an expression for the transfer function T(s)= Vout Vs .
Figure 18: Second order active low-pass filter with voltage follower
The MNA matrix equation can be found as:
( 0000 Vs 0 )T =M ( V1 V2 V3 Vout Is Io )T (28)
In which Is is the unknown current through the voltage source Vs and Io the current delivered by the nullor and
M=( 1 R1 - 1 R1 0010 - 1 R1 1 R1 + 1 R2 + sC1 - 1 R2 - sC1 00 0- 1 R2 1 R2 + sC2 000 0- sC1 0 sC1 01 100000 001-100 ) (29)
The transfer T(s) from Vs to Vout can be found as:
From which we find the transfer function:
T(s)= Vout Vs = ( M-1 )4,5 = 1 1+ sC2 ( R1 + R2 )+ s2 C1 C2 R1 R2 (30)
Example
The circuit from figure 19 represents an active third-order unity-gain low-pass filter. Evaluate the transfer of the circuit:
Figure 19: Unity-gain third-order low-pass filter section.
The MNA equations are:
( 00000 Vs 0 )T =M ( V1 V2 V3 V4 V5 Is Io )T (31)
In which
M=( 1 R1 - 1 R1 00010 - 1 R1 1 R1 + 1 R2 + sC2 - 1 R2 0000 0- 1 R2 1 R2 + 1 R3 + sC1 - 1 R3 - sC1 00 00- 1 R3 1 R3 + sC3 000 00- sC1 0 sC1 01 1000000 0001-100 ) (32)
From which we find the transfer function T(s)
T(s)= Vout Vs = ( M-1 )5,6 = 1 ( 1+ +s( C2 R1 + C3 R1 + C3 R2 + C3 R3 )+ + s2 ( C1 C3 R1 R3 + C2 C3 R1 R2 + C1 C3 R2 R3 + C2 C3 R1 R3 )+ + s3 C1 C2 C3 R1 R2 R3 ) (33)
Example
We will determine the input impedance of the circuit from figure 20. To do so, we will inject a current Ii and determine the voltage at node 1. The MNA equations for the circuit with ideal opamps (nullors) are
( Ii 000000 )T =M ( V1 V2 V3 V4 V5 I1 I2 )T (34)
In which
M=( Y1 - Y1 00000 - Y1 Y1 + Y2 - Y2 0010 0- Y2 Y2 + Y3 - Y3 000 00- Y3 Y3 + Y4 - Y4 01 000- Y4 Y4 + Y5 00 00-10100 10-10000 ) (35)
Figure 20: Circuit setup for determination of the input impedance of the GIC.
The input impedance is found as:
Zi = ( M-1 )1,1 = Z1 Z3 Z5 Z2 Z4 (36)
This circuit is known as a Generalized Impedance Converter (GIC). If we take resistors for Z1 , Z2 , Z3 and Z5 and a capacitor for Z4 , the circuit can be represented by an inductor to ground having:
L= sC4 R1 R3 R5 R2 (37)
If two impedances in the numerator are realized by capacitors and all other impedances are resistors, the circuit behaves as a second order capacitor:
Zi = 1 s2 D (38)
These so-called D-elements or FDNR (Frequency Dependent Negative Resistors) can be used to generate active filters directly from their LC prototypes.

5.3  Overview of MNA stamps implemented in SLiCAP

The syntax for the corresponding net list entries of network elements are given in typewriter font. All elements are considered to be floating with respect to the reference node. Hence, the dimension of their MNA stamp is the sum of the number terminals and the number of dependent currents.

5.3.1  Independent Current Source


( I -I )=( ·· ·· )( V1 V2 )

5.3.2  Independent Voltage Source


( · · V )=( ··1 ··-1 1-10 )( V1 V2 IV )

5.3.3  Linear Resistor


( · · )=( 1 R - 1 R - 1 R 1 R )( V1 V2 )

5.3.4  Linear Capacitor


( · · )=( sC-sC -sCsC )( V1 V2 )

5.3.5  Linear Admittance


( · · )=( sY-sY -sYsY )( V1 V2 )

5.3.6  Linear Inductor


( · · )=( 1 sL - 1 sL - 1 sL 1 sL )( V1 V2 )

5.3.7  Linear Impedance


( · · )=( 1 sZ - 1 sZ - 1 sZ 1 sZ )( V1 V2 )

5.3.8  Voltage-Controlled Current Source: VCCS


( · · · · )=( ··G-G ··-GG ···· ···· )( V1 V2 V3 V4 )

5.3.9  Voltage-Controlled Voltage Source: VCVS


( · · · · 0 )=( ····1 ····-1 ····0 ····0 1-1-EE0 )( V1 V2 V3 V4 IE )

5.3.10  Current-Controlled Voltage Source: CCVS


( · · · · 0 0 )=( ····01 ····0-1 ····10 ····-10 001-100 1-100-H0 )( V1 V2 V3 V4 Ii IH )

5.3.11  Current-Controlled Voltage Source: CCCS


( · · · · 0 )=( ····F ····-F ····1 ····-1 001-10 )( V1 V2 V3 V4 Ii )

5.3.12  Nullor


( · · · · 0 )=( ····1 ····-1 ····0 ····0 001-10 )( V1 V2 V3 V4 Io )

5.3.13  Ideal Transformer


( · · · · 0 )=( ····n ····-n ····1 ····-1 n-n-110 )( V1 V2 V3 V4 Io )

5.3.14  Ideal Gyrator


( · · · · )=( ··G-G ··-GG -GG·· G-G·· )( V1 V2 V3 V4 )

5.3.15  Coupling Factor


( · · · · )=( 1 sL1 1 1- k2 - 1 sL1 1 1- k2 - k s L1 L2 1 1- k2 k s L1 L2 1 1- k2 - 1 sL1 1 1- k2 1 sL1 1 1- k2 k s L1 L2 1 1- k2 - k s L1 L2 1 1- k2 - k s L1 L2 1 1- k2 k s L1 L2 1 1- k2 1 sL2 1 1- k2 - 1 sL2 1 1- k2 k s L1 L2 1 1- k2 - k s L1 L2 1 1- k2 - 1 sL2 1 1- k2 1 sL2 1 1- k2 )( V1 V2 V3 V4 )




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On 15 Aug 2008, 21:58.